Automatic gain control (AGC) systems are generally used in many kinds of electronic products, such as communication products, memory storage products, wireless transceivers, etc. The automatic gain control system comprises a variable gain amplifier (VGA) to amplify the received signals whose amplitudes may vary within a wide range so that amplified signals output from the variable gain amplifier can have a substantially constant amplitude.
FIG. 1 is a circuit diagram illustrating a conventional variable gain amplifying circuit 10. The variable gain amplifying circuit 10 is provided for amplifying the differential input signals Vin+ and Vin−. The variable gain amplifying circuit 10 comprises a plurality of stages, such as a first stage 101 and a second stage 102. The first stage 101 comprises two bipolar junction transistors (BJT) 110, 120, three resistors 130, 132, 134, and two voltage controlled current sources 140, 142. The base of BJT 110 is used for receiving the input signal Vin+ and the base of BJT 120 is used for receiving the input signal Vin−. The collector of BJT 110 is used for outputting the output signal Vout1− and the collector of BJT 120 is used for outputting the output signal Vout1+. The output signals Vout1+ and Vout1− are amplified by the first stage 101. The resistor 130 is connected between the emitters of the BJTs 110 and 120. The resistance of resistor 130 is represented as RE. The resistor 132 is connected between VDD and the collector of BJT 110 and the resistor 134 is connected between a voltage source VDD and the collector of BJT 120. Both of the resistances of resistors 132 and 134 are represented as RL. The voltage controlled current source 140 is connected between the emitter of BJT 110 and ground, and the voltage controlled current source 142 is connected between the emitter of BJT 120 and ground. The currents respectively flowing through the voltage controlled current sources 140 and 142 are equal to each other and represented as IE. The current IE of each current source is controlled by a control voltage Vctrl.
As shown in FIG. 1, the gain Av of each stage of the variable gain amplifying circuit 10 can be derived as equation (1):
                    Av        =                                                            g                m                            ⁢                              R                L                                                    1              +                                                g                  m                                ⁢                                  R                  E                                                              =                                    R              L                                                                        V                  T                                                  I                  C                                            +                              R                E                                                                        (        1        )            where gm is a transconductance of BJT 110 or 120, VT is a thermal voltage of BJT 110 or 120, and IC is a collector current of BJT 110 or 120.
According to equation (1), the gain Av of each stage will be decreased if the collector current IC decreases due to the decrease of the control voltage Vctrl. The emitter current IE is approximate to the collector current IC according to the basic characteristic of the BJT. The emitter current IE is very low when the gain of each stage is very low. It causes that the voltage Vheadroom (i.e. the voltage drop between two ends of resistor 132, Vheadroom=IE×RL) is very small. The input signals will be “clipped” by the stage of variable gain amplifying circuit 10 when the input signals are large swing AC signals. In other words, the peak of waveform of large swing AC signals will be cut because the voltage Vheadroom of variable gain amplifying circuit 10 is very small. Accordingly, the variable gain amplifying circuit 10 needs more stages to avoid such a phenomenon.
FIG. 2 is a circuit diagram illustrating another conventional variable gain amplifying circuit 20. The variable gain amplifying circuit 20 is similar to aforementioned variable gain amplifying circuit 10, but instead of using the resistor 130 and two voltage controlled current sources 140, 142 in each stage, a field-effect transistor (FET) 200 is connected to provide the resistance RE between the emitters of two BJTs 210, 220, and two current sources 240, 242 to provide a steady emitter current IE to the corresponding BJT respectively. A control voltage Vctrl is inputted into the gate of the FET 200 for controlling the resistance RE.
As shown in FIG. 2, the gain Av of each stage of the variable gain amplifying circuit 20 can be derived as equation (2):
                    Av        =                                                            g                m                            ⁢                              R                L                                                    1              +                                                g                  m                                ⁢                                  R                  E                                                              =                                    R              L                                                      1                                  g                  m                                            +                              R                E                                                                        (        2        )            where gm is a transconductance of BJT 210 or 220.
According to equation (2), the gain Av of each stage will be decreased if the resistance RE increases due to the decrease of the control voltage Vctrl. The FET 200 will reach a cut-off or saturation regions when the control voltage Vctrl is low during a low gain Av. It causes that the gain range of each stage is very limited. Accordingly, the variable gain amplifying circuit 20 needs more stages to obtain wider gain range.
Therefore, there is a need for a variable gain amplifying circuit having larger gain range in each stage thereof so that the variable gain amplifying circuit needs fewer stages thereof.